Inband management of ethernet links

ABSTRACT

Disclosed are various embodiments for in-band management of Ethernet links utilizing a bit-interleaved parity (BIP) block in a transmission frame. According to various embodiments, a bit-interleaved parity error code may be generated for a monitored portion of network data for transmission in a first bit-interleaved parity block. Subsequently, network management data may be encoded in a plurality of bits for transmission in a second bit-interleaved parity block according to a predefined block code, wherein the predefined block code generates the plurality of bits to maintain a DC balance between the bit-interleaved parity error code and the plurality of bits.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of and priority to U.S. ProvisionalApplication Ser. No. 61/881,673, filed Sep. 24, 2013, and entitled“INBAND MANAGEMENT OF ETHERNET LINKS” which is incorporated by referenceherein in its entirety.

BACKGROUND

In-band management relates to the local management of a network. In-bandmanagement may be achieved, for example, via a virtual connection to acommunication device in the network or by employing a Simple NetworkManagement Protocol (SNMP). These connections consume bandwidth andtraditionally require a complex management layer. In addition,management of a remote device in a network generally requires aprocessor sub-system with a dedicated Ethernet port which is oftencomplex and costly.

Bit-interleaved parity (BIP) is a method of error detection employed innetworks to determine whether a data transmission comprises an error. InBIP, a parity byte is calculated bit-wise across a number of bytes in aframe for data transmission, such as an Ethernet frame or data packet,to force character bit patterns into even parity.

BRIEF DESCRIPTION OF THE DRAWINGS

Many aspects of the present disclosure can be better understood withreference to the following drawings. The components in the drawings arenot necessarily to scale, with emphasis instead being placed uponclearly illustrating the principles of the disclosure. Moreover, in thedrawings, like reference numerals designate corresponding partsthroughout the several views.

FIG. 1 is a drawing illustrating a network center environment in whichnetwork administrators control communication devices according tovarious embodiments of the present disclosure.

FIG. 2 is a drawing of a networked environment according to variousembodiments of the present disclosure.

FIG. 3 is a drawing of an alignment marker format according to variousembodiments of the present disclosure.

FIG. 4 is a drawing of a portion of a network comprising a firstEthernet switch and a second Ethernet switch according to variousembodiments of the present disclosure.

FIG. 5 is a drawing of a portion of a network comprising an Ethernetswitch and a gearbox PHY according to various embodiments of the presentdisclosure.

FIG. 6 is a flowchart illustrating one example of functionalityimplemented as portions of an encoding application executed in acommunication device according to various embodiments of the presentdisclosure.

FIG. 7 is a flowchart illustrating one example of functionalityimplemented as portions of an encoding application executed in a chipaccording to various embodiments of the present disclosure.

FIG. 8 is a schematic block diagram that provides one exampleillustration of a computing environment employed in the networkedenvironment of FIG. 2 according to various embodiments of the presentdisclosure.

DETAILED DESCRIPTION

The present disclosure relates to in-band management of Ethernet linksutilizing a bit-interleaved parity (BIP) block in a transmission frame.In-band management relates to the local management of a network. In-bandmanagement may be achieved, for example, via a virtual connection to acommunication device within the network or by employing a Simple NetworkManagement Protocol (SNMP). These connections consume bandwidth andtraditionally require a complex management layer. Additionally,management of remote devices in a network generally requires a processorsub-system with a dedicated Ethernet port which is often complex andcostly.

For example, an administrator of a network may monitor, maintain, orotherwise interact with communication devices (e.g., Ethernet switches,routers, servers) installed in one or more racks in a network center,wherein each of the one or more racks may be managed as an individualand segmented unit within the network center. A “top of the rack” (TOR)device (e.g., a server, a switch, etc.) located in a rack may connect toone or more Ethernet switches installed within the rack and may be usedas a central device for monitoring or configuring the devices installedwithin the rack. Similarly, an “end of row” (EOR) device (e.g., aserver, a switch, etc.) located in a rack may connect to one or moreEthernet switches installed within one or more racks in the networkcenter and may be used as a central device for monitoring or configuringthe devices within the one or more racks. To monitor, maintain, orotherwise interact with the Ethernet switches in the rack, theadministrator may make a physically connection to the TOR device or EORdevice via an Ethernet management cable and/or a console to transmitnetwork management information used in the maintenance, configuration,reconfiguration, and/or management of the network.

According to various embodiments of the present disclosure, networkmanagement information may be encoded in existing transmission framesthat otherwise would have been sent without network managementinformation. A BIP error code may be generated for a monitored portionof network data for transmission in a first BIP block. Networkmanagement data may be encoded in a plurality of bits for transmissionin a second BIP block according to a predefined block code, wherein thepredefined block code generates the plurality of bits to maintain adirect current (DC) balance between the bit-interleaved parity errorcode and the plurality of bits, as will be discussed in greater detailbelow.

By transmitting network management data in existing transmission frames,maintenance and/or control of TOR and/or EOR devices may be facilitatedwithout the use of an Ethernet management cable or console and will notincrease the bandwidth used in transmitting separate network managementdata. Alternative in-band management implementations may require adesignated internet protocol (IP) address, may be complex, and mayconsume network bandwidth. In the following discussion, a generaldescription of the system and its components is provided, followed by adiscussion of the operation of the same.

FIG. 1 shows an example environment 100 in which a TOR or EOR device ismanaged or otherwise configured. The example environment 100 maycomprise a network center, a data center, and/or any other physicalinstallation in which multiple computer equipment, resources,assemblies, and/or components are received and installed on an ongoingbasis. The example environment 100 may house multiple components orresources, such as, e.g., computers, communication devices, networkingcomponents, power supplies, cooling equipment, and/or so forth. Theequipment may be housed in rows or grids of similar or identicalequipment racks. The network center may be housed in a room, a building,a compound that includes multiple buildings, modular container unit orany other environment used for housing computing equipment.

An equipment rack 101 is an example of a component assembly or componenthousing that may be used in a network center. The equipment rack 101 maycontain multiple individual components 104 and/or other sub-components.The components 104 may be interconnected and connected to the equipmentrack 101 using various cables in order to support network connectivity,console connectivity, electrical power, and/or other services.

The network center may be staffed by one or more administrators 108, orother support personnel. Generally, to configured one or more components104 of the equipment rack 101, the administrators 108 may use a console110 to assist in performing various diagnostic, informational, andadministrative tasks. The console 110 may be a general-purpose device,such as a laptop computer, personal digital assistant (PDA), tabletcomputer, slate computer, smartphone, or a non-portable computing device(for example, a workstation or purpose-built stationary appliancelocated near the data center loading dock) upon which applications maybe executed. The console 110 may comprise a display 112, a printer,and/or other type of interface device for communicating with theadministrator 108.

The console 110 may be capable of configured the various components 104of the equipment rack 101 by interacting with a TOR device 103 (or anEOR device) via an Ethernet cable 115 or like component. FIG. 1 depictsa traditional scenario in which the administrator 108 is conductingmanagement operations on one or more of the various components 104 ofthe equipment rack 101 by interacting with the TOR device 113 via aconsole 110, traditionally requiring the use of an Ethernet cable andthe physical presence of the administrator 108. However, by encodingnetwork management data in existing transmission frames, the use of anEthernet cable and the physical presence of the administrator 108 may beavoided.

Referring next to FIG. 2, shown is an example of a networked environment200 according to various embodiments of the present disclosure. Thenetworked environment 200 may comprise, for example, a network center, adata center, a high performance computing datacenter, or any other typeof networked computing environment. The networked environment 200includes multiple network devices. For example, the embodiment shown inFIG. 2 includes a source device 203, a destination device 206, and oneor more intermediary devices 209. The network 212 is operable tofacilitate data communication among the source device 203, thedestination device 206, the intermediary devices 209, and/or potentiallyother network devices.

The source device 203 is representative of multiple source devices 203that may be in communication with the network 212. According to variousembodiments, the source device 203 may comprise a processor-basedsystem, such as a server computer, a switch, a router, or any othersuitable communication device. The source device 203 is operable totransmit and receive data to and from the destination device 206 and/orother devices using the network 212. To this end, the source device 203comprises source device processing circuitry 215 and potentially othercomponents and/or functionality. The source device processing circuitry215 may, for example, generate data, format data, transmit data, and/orperform other processing functionality. As such, the source deviceprocessing circuitry 215 may comprise, for example, a network interfacecard (NIC), a transceiver physical layer (PHY), and/or other types ofcomponents.

The source device 203 generates and transmits transmission frames 218(e.g., Ethernet frames or data packets) to the destination device 206and/or other devices using the network 212. The destination device 206and potentially other devices may generate transmission frames 218 aswell. A transmission frame 218 comprises framed data that is suitablefor transmission in the network 212. The transmission frame 218, forexample, may comprise control data and payload data, wherein the controldata facilitates the routing and transmission of the payload data in thetransmission frame 218. The transmission frame 218 may also comprisenetwork management data 220 that is located in, for example, portions ofthe transmission frame 218, as will be discussed in greater detailbelow.

The intermediary devices 209 are representative of one or moreintermediary devices 209 a, 209 b, and/or 209 c (and so forth) that maybe present in the network 212. In the non-limiting example of FIG. 2,the intermediary device 209 a is the first communication device in thenetwork 212 that a transmission frame 218 encounters after beingtransmitted by the source device 203.

In the example of FIG. 2, the intermediary devices 209 may route andtransfer the transmission frames 218 within the network 212. To thisend, the intermediary devices 209 comprise intermediary deviceprocessing circuitry 221 and potentially other components and/orfunctionality. The intermediary device processing circuitry 221 isoperable to receive a transmission frame 218 from the source device 203,process the transmission frame 218, and route and transmit thetransmission frame 218 in the network 212.

The destination device 206 is representative of multiple destinationdevices 206 that may be in communication with the network 212. Thedestination device 206 is operable to receive transmission frames 218from the network 212. To this end, the destination device 206 comprisesdestination device processing circuitry 224 and potentially othercomponents and/or functionality. According to various embodiments, thedestination device 206 may comprise a processor-based or processor-lesssystem, such as a server computer, a switch, a network controller, arouter, or any other suitable communication device. The destinationdevice processing circuitry 224 may, for example, receive a transmissionframe 218, remove the network management data 220 in the transmissionframe 218, and process the network management data 220 in thetransmission frame 218. As such, the destination device processingcircuitry 224 may comprise, for example, a network interface card (NIC),a transceiver physical layer (PHY), and/or other types of components.

Next, a discussion of an example of the operation of the networkedenvironment 200 is provided. In the following discussion, it is assumedthat the source device 203 and the destination device 206 are incommunication with the network 212.

The source device 203 may prepare to transmit a transmission frame 218that comprises network management data 220 that is to be transmitted asat least a portion of the payload. Such network management data 220 maybe generated by and originate from the source device 203. Alternatively,another communication device may generate the network management data220, and the source device 203 may receive the network management data220 from the other device and then transmit the network management data220 in the transmission frame 218 on behalf of the other device.

As may be appreciated, transmission frames 218 may comprise errordetection codes (error codes) that facilitate reliable delivery of dataover communication channels. Accordingly, in various embodiments, thesource device processing circuitry 215 may encode an error code for amonitored portion of network data for transmission in a first blockwithin the transmission frame 218. Further, the source device processingcircuitry 215 may encode network management data 220 in a second blockof the transmission frame 218 without modification of the payload dataand without the use of additional transmission frames 218. According tovarious embodiments, the network management data 220 may be encodedaccording to a predefined block code, wherein the predefined block codegenerates a plurality of bits comprising the network management 220 tomaintain a DC balance between the error code and the network managementdata 220. The source device processing circuit 215 may generate orotherwise configure the transmission frame 218 comprising at least thefirst block and the second block for transmission to the destinationdevice 206. According to various embodiments, the destination device 206may comprise a TOR device 113 (or an EOR device) that may be configuredto process the network management data 220 within the transmission frame218 to configure or reconfigure various components within an equipmentrack 101 according to the network management data 220. Generation of thetransmission packet 218 comprising network management data 220 will bediscussed in greater detail below.

Turning now to FIG. 3, shown is an exemplary structure of an alignmentmarker 300 that may be employed as a transmission frame 218, or at leasta portion of a transmission frame 218, according to various embodimentsof the present disclosure. In the non-limiting example of FIG. 3, analignment marker 300 may comprise 66 bits, although other lengths ofbits may be employed, as can be appreciated. A header 303, may comprise10 bits of the alignment marker 300 and may comprise control informationused in, for example, the routing of the alignment marker 300 from asource device 203 to a destination device 206.

A first portion 306 of the alignment marker 300 may comprise one or more“words,” or a plurality of bits, that represent at least a portion of apayload of the alignment marker 300. In the non-limiting example of FIG.3, each word of the first portion 306 has a length of 8 bits and isdenoted by M₀, M₁, and M₂. Similarly, a second portion 309 of thealignment marker 300 may comprise one or more words representing atleast a portion of the payload of the alignment marker 300. In thenon-limiting example of FIG. 3, each word of the second portion 309 hasa length of 8 bits and is denoted by M₄, M₅, and M₆.

Bit-interleaved parity (BIP) code is a method of monitoring error ratesof network links (e.g., Ethernet links). An X-bit BIP error code (BIP-X)may be generated for a monitored portion (e.g., monitored payloadblocks) having even parity for transmission over a specific portion, orblock, of a transmission frame 218. A first bit-interleaved parity block312 may comprise, for example, an error detection code in a first BIPformat. In the non-limiting example of FIG. 3, the first BIP format maycomprise bit-interleaved parity-3 (BIP-3) comprising an error detectioncode of 8 bits. BIP-3 may comprise, for example, 8 parity bits toquickly estimate a bit error rate (BER) for a monitored portion of dataat a PHY layer. An equivalent bit error rate (BER_(Equivalent)) may bedetermined via:

$\begin{matrix}{{BER}_{Equivalent} = \frac{{Number}\mspace{14mu} {of}\mspace{14mu} {Errored}\mspace{14mu} {{Blocks}/{Second}}}{{Total}\mspace{14mu} {Number}\mspace{14mu} {of}\mspace{14mu} {{Bits}/{Second}}}} & \left( {{eq}.\mspace{14mu} 1} \right)\end{matrix}$

Similarly, a second bit-interleaved parity block 315 may comprise, forexample, an error detection code in a second BIP format. In thenon-limiting example of FIG. 3, the second BIP format may comprisebit-interleaved parity-7 (BIP-7) comprising an error detection code of 8bits. As may be appreciated, in various structures of alignment markers300, the second BIP block 315 may comprise a bitwise inverse (XOR) ofthe bits in the first BIP block 312 to maintain a DC balance in thealignment marker 300. For example, a BIP-7 word may be determined tomaintain DC balance with respect to a BIP-3 word via:

Bits_(BIP-7)=˜(Bits_(BIP-3))  (eq. 2).

As can be appreciated, a primary use of a BIP-7 block 315 is to maintainDC parity with the BIP-3 block 312. However, all or at least a portionof the bits in the second BIP block 315 may be dedicated for encodingnetwork management data 220 while maintaining the DC balance.Accordingly, network management data 220 may be transmitted in otherwiseexisting transmission frames 218 while maintaining DC balance in thealignment marker 300.

As a non-limiting example, all 8 bits in an 8-bit second BIP block 315may be used to encode network management data 220. The 8 bitsrepresenting network management data 220 may be encoded according to ablock code so that the resulting bits maintain DC balance in thetransmission frame 218, while comprising network management data 200. Inanother example, 5 bits in the 8-bit second BIP block 315, or any othersubset of bits, may be employed to encode network management data 220.For example, the 5 bits may be used to encode network management data220. The remaining 3 bits may be determined such that DC balance ismaintained in the transmission frame 218. Thus, the plurality ofremaining bits in the second bit-interleaved parity block is to generatea uniform block comprising both the encoded network management data(e.g., the 5 bits) and the resulting bits (e.g., the 3 bits) encoded tomaintain DC balance between the uniform block and the first BIP block312. Accordingly, network management data 220 may be encoded in existingtransmission frames 218 without necessitating separate transmission ofthe network management data 220 as a payload in a plurality oftransmission frames 218, thereby avoiding an increase in bandwidth of anetwork 212.

As may be appreciated, the transmission frames 218 may be employed invarious technologies for sending transmission frames 218 such as 40Gigabit Ethernet (40 GbE), 100 Gigabit Ethernet (100 GbE), and/or othertechnologies. Tables 1 and 2 below show examples of 40 GbE and 100 GbEdistinct personal communication service (PCS) lane markers,respectively, which may include the first BIP block 312 (e.g., a BIP-3block) and the second BIP block 315 (e.g., a BIP-7 block).

TABLE 1 40 GbE PCS Lane Alignment Encoding PCS Lane Encoding Number {M₀,M₁, M₂, BIP₃, M₄, M₅, M₆, BIP₇} 0 0x90, 0x76, 0x47, BIP₃, 0x64, 0x89,0xB8, BIP₇ 1 0xF0, 0xC4, 0xE6, BIP₃, 0x0F, 0x3B, 0x19, BIP₇ 2 0xC5,0x65, 0x9B, BIP₃, 0x3A, 0x9A, 0x64, BIP₇ 3 0xA2, 0x79, 0x3D, BIP₃, 0x5D,0x86, 0xC2, BIP₇

TABLE 2 100 GbE PCS Lane Alignment Encoding PCS Lane Encoding Number{M₀, M₁, M₂, BIP₃, M₄, M₅, M₆, BIP₇} 0 0x90, 0x76, 0x47, BIP₃, 0x64,0x89, 0xB8, BIP₇ 1 0xF0, 0xC4, 0xE6, BIP₃, 0x0F, 0x3B, 0x19, BIP₇ 20xC5, 0x65, 0x9B, BIP₃, 0x3A, 0x9A, 0x64, BIP₇ 3 0xA2, 0x79, 0x3D, BIP₃,0x5D, 0x86, 0xC2, BIP₇ 4 0x90, 0x76, 0x47, BIP₃, 0x64, 0x89, 0xB8, BIP₇5 0xDD, 0x14, 0xC2, BIP₃, 0x22, 0xEB, 0x3D, BIP₇ 6 0x90, 0x76, 0x47,BIP₃, 0x64, 0x89, 0xB8, BIP₇ 7 0x7B, 0x45, 0x66, BIP₃, 0x84, 0xBA, 0x99,BIP₇ 8 0xA0, 0x24, 0x76, BIP₃, 0x5F, 0xDB, 0x89, BIP₇ 9 0x68, 0xC9,0xFB, BIP₃, 0x97, 0x36, 0x04, BIP₇ 10 0xFD, 0x6C, 0x99, BIP₃, 0x02,0x93, 0x66, BIP₇ 11 0xB9, 0x91, 0x55, BIP₃, 0x46, 0x6E, 0xAA, BIP₇ 120x5C, 0xB9, 0xB2, BIP₃, 0xA3, 0x46, 0x4D, BIP₇ 13 0x1A, 0xF8, 0xBD,BIP₃, 0xE5, 0x07, 0x42, BIP₇ 14 0x83, 0xC7, 0xCA, BIP₃, 0x7C, 0x38,0x35, BIP₇ 15 0x35, 0x36, 0xCD, BIP₃, 0xCA, 0x7C, 0x38, BIP₇ 16 0xC4,0x31, 0x4C, BIP₃, 0x3B, 0xCE, 0xB3, BIP₇ 17 0xAD, 0xD6, 0xB7, BIP₃,0x52, 0x29, 0x48, BIP₇ 18 0x5F, 0x66, 0x2A, BIP₃, 0xA0, 0x99, 0xD5, BIP₇19 0xC0, 0xF6, 0xE5, BIP₃, 0x3F, 0x0F, 0x1A, BIP₇

According to various embodiments, a source device 203, a destinationdevice 206, or any other communication device may comprise, for example,a gearbox PHY. The structure of multi-link gearbox (MLG) 1.0 PCS lanenumbers are similar to Ethernet multi-link device (MLD) PCS lanenumbers, however, with new distinct PCS lane numbers. For example, MLG1.0 PCS lane numbers also include a BIP-3 block and a BIP-7 block. Table3 below shows an example of 4×25 MLG lane alignment marker values whichmay include a BIP-3 block and a BIP-7 block.

TABLE 3 4x25G MLG Lane Alignment Marker Values MLG MLG Lane EncodingLane Encoding Num- {M₀, M₁, M₂, BIP₃, Num- {M₀, M₁, M₂, BIP₃, ber M₄,M₅, M₆, BIP₇} ber M₄, M₅, M₆, BIP₇} 0.0 0x80, 0xB4, 0xAF, BIP₃, 0.10x29, 0x85, 0x1D, BIP₃, 0x7F, 0x4B, 0x50, BIP₇ 0xD6, 0x7A, 0xE2, BIP₇1.0 0x11, 0x2A, 0xD8, BIP₃, 1.1 0xBF, 0x7E, 0xfD, BIP₃, 0xEE, 0xD5,0x27, BIP₇ 0x40, 0x81, 0xB2, BIP₇ 2.0 0x7C, 0x3F, 0x1C, BIP₃, 2.1 0xEE,0x8B, 0xBA, BIP₃, 0x83, 0xC0, 0xE3, BIP₇ 0x11, 0x74, 0x45, BIP₇ 3.00xD1, 0x87, 0x25, BIP₃, 3.1 0xD0, 0x02, 0x39, BIP₃, 0x2E, 0x78, 0xDA,BIP₇ 0x2F, 0xFD, 0xC6, BIP₇ 4.0 0x6D, 0xFE, 0x11, BIP₃, 4.1 0xA1,0xD2,0xAB, BIP₃, 0x92, 0x01, 0xEE, BIP₇ 0x5E, 0x2D, 0x54, BIP₇ 5.0 0x0E,0xC6, 0x3C, BIP₃, 5.1 0x98, 0x78, 0x07, BIP₃, 0xF1, 0x39, 0xC3, BIP₇0x67, 0x87, 0xF8, BIP₇ 6.0 0x1B, 0xBF, 0xA0, BIP₃, 6.1 0x31, 0x90, 0xC3,BIP₃, 0xE4, 0x40, 0x5F, BIP₇ 0xCE, 0x6F, 0x3C, BIP₇ 7.0 0x0D, 0x9A,0x46, BIP₃, 7.1 0x9F, 0x08, 0xB6, BIP₃, 0xF2, 0x65, 0xB9, BIP₇ 0x60,0xF7, 0x49, BIP₇ 8.0 0xBB, 0x55, 0x9D, BIP₃, 8.1 0xA8, 0x05, 0xFC, BIP₃,0x44, 0xAA, 0x62, BIP₇ 0x57, 0xFA, 0x03, BIP₇ 9.0 0x04, 0xA1, 0x94,BIP₃, 9.1 0x07, 0x72, 0xDB, BIP₃, 0xFB, 0x5E, 0x6B, BIP₇ 0xF8, 0x8D,0x24, BIP₇

MLG 2.0, as opposed to MLG 1.0, comprises two modes of operation: 4×25Gand 8×25G. Tables 4 and 5 below show examples of the PCS lane numbers of4×25G and 8×25G modes, respectively.

TABLE 4 4x25G MLG Lane Alignment Marker Values MLG MLG Lane EncodingLane Encoding Num- {M₀, M₁, M₂, BIP₃, Num- {M₀, M₁, M₂, BIP₃, ber M₄,M₅, M₆, BIP₇} ber M₄, M₅, M₆, BIP₇} 0.0-10 0x80, 0xB4, 0xAF, BIP₃, 0.10x29, 0x85, 0x1D, BIP₃, 0x7F, 0x4B, 0x50, BIP₇ 0xD6, 0x7A, 0xE2, BIP₇0.0-40 0x89, 0x40, 0x9F, BIP₃, 0x76, 0xBF, 0x60, BIP₇ 1.0-10 0x11, 0x2A,0xD8, BIP₃, 1.1 0xBF, 0x7E, 0xfD, BIP₃, 0xEE, 0xD5, 0x27, BIP₇ 0x40,0x81, 0xB2, BIP₇ 1.0-40 0xAA, 0x39, 0xE3, BIP₃, 0x55, 0xC6, 0x1C, BIP₇2.0-10 0x7C, 0x3F, 0x1C, BIP₃, 2.1 0xEE, 0x8B, 0xBA, BIP₃, 0x83, 0xC0,0xE3, BIP₇ 0x11, 0x74, 0x45, BIP₇ 2.0-40 0x14, 0x6B, 0xD7, BIP₃, 0xEB,0x94, 0x28, BIP₇ 3.0-10 0xD1, 0x87, 0x25, BIP₃, 3.1 0xD0, 0x02, 0x39,BIP₃, 0x2E, 0x78, 0xDA, BIP₇ 0x2F, 0xFD, 0xC6, BIP₇ 3.0-40 0xE1, 0xDB,0x6C, BIP₃, 0x1E, 0x24, 0x93, BIP₇ 4.0-10 0x6D, 0xFE, 0x11, BIP₃, 4.10xA1, 0xD2, 0xAB, BIP₃, 0x92, 0x01, 0xEE, BIP₇ 0x5E, 0x2D, 0x54, BIP₇4.0-40 0x39, 0xB8, 0x5C, BIP₃, 0xC6, 0x47, 0xA3, BIP₇ 5.0-10 0x0E, 0xC6,0x3C, BIP₃, 5.1 0x98, 0x78, 0x07, BIP₃, 0xF1, 0x39, 0xC3, BIP₇ 0x67,0x87, 0xF8, BIP₇ 5.0-40 0x4A, 0x59, 0x12, BIP₃, 0xB5, 0xA6, 0xED, BIP₇6.0-10 0x1B, 0xBF, 0xA0, BIP₃, 6.1 0x31, 0x90, 0xC3, BIP₃, 0xE4, 0x40,0x5F, BIP₇ 0xCE, 0x6F, 0x3C, BIP₇ 6.0-40 0x55, 0xD3, 0xC6, BIP₃, 0xAA,0x2C, 0x39, BIP₇ 7.0-10 0x0D, 0x9A, 0x46, BIP₃, 7.1 0x9F, 0x08, 0xB6,BIP₃, 0xF2, 0x65, 0xB9, BIP₇ 0x60, 0xF7, 0x49, BIP₇ 7.0-40 0xB6, 0xA2,0xCF, BIP₃, 0x49, 0x5D, 0x30, BIP₇ 8.0 0xBB, 0x55, 0x9D, BIP₃, 8.1 0xA8,0x05, 0xFC, BIP₃, 0x44, 0xAA, 0x62, BIP₇ 0x57, 0xFA, 0x03, BIP₇ 9.00x04, 0xA1, 0x94, BIP₃, 9.1 0x07, 0x72, 0xDB, BIP₃, 0xFB, 0x5E, 0x6B,BIP₇ 0xF8, 0x8D, 0x24, BIP₇

TABLE 5 8x25G MLG Lane Alignment Marker Values MLG MLG Lane EncodingLane Encoding Num- {M₀, M₁, M₂, BIP₃, Num- {M₀, M₁, M₂, BIP₃, ber M₄,M₅, M₆, BIP₇} ber M₄, M₅, M₆, BIP₇}  0.0-10 0x80, 0xB4, 0xAF, BIP₃, 0.10x29, 0x85, 0x1D, BIP₃, 0x7F, 0x4B, 0x50, BIP₇ 0xD6, 0x7A, 0xE2, BIP₇ 0.0-40 0x89, 0x40, 0x9F, BIP₃, 0x76, 0xBF, 0x60, BIP₇  1.0-10 0x11,0x2A, 0xD8, BIP₃, 1.1 0xBF, 0x7E, 0xfD, BIP₃, 0xEE, 0xD5, 0x27, BIP₇0x40, 0x81, 0xB2, BIP₇  1.0-40 0xAA, 0x39, 0xE3, BIP₃, 0x55, 0xC6, 0x1C,BIP₇  2.0-10 0x7C, 0x3F, 0x1C, BIP₃, 2.1 0xEE, 0x8B, 0xBA, BIP₃, 0x83,0xC0, 0xE3, BIP₇ 0x11, 0x74, 0x45, BIP₇  2.0-40 0x14, 0x6B, 0xD7, BIP₃,0xEB, 0x94, 0x28, BIP₇  3.0-10 0xD1, 0x87, 0x25, BIP₃, 3.1 0xD0, 0x02,0x39, BIP₃, 0x2E, 0x78, 0xDA, BIP₇ 0x2F, 0xFD, 0xC6, BIP₇  3.0-40 0xE1,0xDB, 0x6C, BIP₃, 0x1E, 0x24, 0x93, BIP₇  4.0-10 0x6D, 0xFE, 0x11, BIP₃,4.1 0xA1, 0xD2, 0xAB, BIP₃, 0x92, 0x01, 0xEE, BIP₇ 0x5E, 0x2D, 0x54,BIP₇  4.0-40 0x39, 0xB8, 0x5C, BIP₃, 0xC6, 0x47, 0xA3, BIP₇  5.0-100x0E, 0xC6, 0x3C, BIP₃, 5.1 0x98, 0x78, 0x07, BIP₃, 0xF1, 0x39, 0xC3,BIP₇ 0x67, 0x87, 0xF8, BIP₇  5.0-40 0x4A, 0x59, 0x12, BIP₃, 0xB5, 0xA6,0xED, BIP₇  6.0-10 0x1B, 0xBF, 0xA0, BIP₃, 6.1 0x31, 0x90, 0xC3, BIP₃,0xE4, 0x40, 0x5F, BIP₇ 0xCE, 0x6F, 0x3C, BIP₇  6.0-40 0x55, 0xD3, 0xC6,BIP₃, 0xAA, 0x2C, 0x39, BIP₇  7.0-10 0x0D, 0x9A, 0x46, BIP₃, 7.1 0x9F,0x08, 0xB6, BIP₃, 0xF2, 0x65, 0xB9, BIP₇ 0x60, 0xF7, 0x49, BIP₇  7.0-400xB6, 0xA2, 0xCF, BIP₃, 0x49, 0x5D, 0x30, BIP₇  8.0-10 0xBB, 0x55, 0x9D,BIP₃, 8.1 0xA8, 0x05, 0xFC, BIP₃, 0x44, 0xAA, 0x62, BIP₇ 0x57, 0xFA,0x03, BIP₇  8.0-40 0x20, 0x37, 0x16, BIP₃, 0xDF, 0xC8, 0xE9, BIP₇ 9.0-10 0x04, 0xA1, 0x94, BIP₃, 9.1 0x07, 0x72, 0xDB, BIP₃, 0xFB, 0x5E,0x6B, BIP₇ 0xF8, 0x8D, 0x24, BIP₇  9.0-40 0xCA, 0xBC, 0x1A, BIP₃, 0x35,0x43, 0xE5, BIP₇ 10.0-10 0x37, 0xA0, 0x0D, BIP₃, 10.1 0xE6, 0xEF, 0x8C,BIP₃, 0xC8, 0x5F, 0xF2, BIP₇ 0x19, 0x10, 0x73, BIP₇ 10.0-40 0x7F, 0xC0,0xCC, BIP₃, 0x80, 0x3F, 0x33, BIP₇ 11.0-10 0x6A, 0xD9, 0x73, BIP₃, 11.10x41, 0xDE, 0x0A, BIP₃, 0x95, 0x26, 0x8C, BIP₇ 0xBE, 0x21, 0xF5, BIP₇11.0-40 0x32, 0xFA, 0xE2, BIP₃, 0xCD, 0x05, 0x1D, BIP₇ 12.0-10 0xDF,0x13, 0x45, BIP₃, 12.1 0x8D, 0x0D, 0xBC, BIP₃, 0x20, 0xEC, 0xBA, BIP₇0x72, 0xF2, 0x43, BIP₇ 12.0-40 0xD6, 0x9B, 0x18, BIP₃, 0x29, 0x64, 0xE7,BIP₇ 13.0-10 0x43, 0xBB, 0x33, BIP₃, 13.1 0xD2, 0xE9, 0x97, BIP₃, 0xBC,0x44, 0xCC, BIP₇ 0x2D, 0x16, 0x68, BIP₇ 13.0-40 0x4E, 0xBA, 0x03, BIP₃,0xB1, 0x45, 0xFC, BIP₇ 14.0-10 0x2D, 0x17, 0x04, BIP₃, 14.1 0x3A, 0x83,0x31, BIP₃, 0xD2, 0xE8, 0xFB, BIP₇ 0xC5, 0x7C, 0xCE, BIP₇ 14.0-40 0xC6,0x57, 0x48, BIP₃, 0x39, 0xA8, 0xB7, BIP₇ 15.0-10 0xED, 0xCD, 0x5E, BIP₃,15.1 0x65, 0xB2, 0x32, BIP₃, 0x12, 0x32, 0xA1, BIP₇ 0x9A, 0x4D, 0xCD,BIP₇ 15.0-40 0xEF, 0x22, 0x4A, BIP₃, 0x10, 0xDD, 0xB5, BIP₇ 16.0-100x2B, 0x1A, 0x05, BIP₃, 16.1 0x22, 0x0C, 0xDC, BIP₃, 0xD4, 0xE5, 0xFA,BIP₇ 0xDD, 0xF3, 0x23, BIP₇ 16.0-40 0x4B, 0x5C, 0x41, BIP₃, 0xB4, 0xA3,0xBE, BIP₇ 17.0-10 0x47, 0xAE, 0x79, BIP₃, 17.1 0xB8, 0xA3, 0xD6, BIP₃,0xB8, 0x51, 0x86, BIP₇ 0x47, 0x5C, 0x29, BIP₇ 17.0-40 0x69, 0x19, 0xAE,BIP₃, 0x96, 0xE6, 0x51, BIP₇ 18.0-10 0xC3, 0xF7, 0x82, BIP₃, 18.1 0xCD,0x0A, 0x6F, BIP₃, 0x3C, 0x08, 0x7D, BIP₇ 0x32, 0xF5, 0x90, BIP₇ 18.0-400x86, 0x8D, 0xC5, BIP₃, 0x79, 0x72, 0x3A, BIP₇ 19.0-10 0x21, 0xCE, 0xB9,BIP₃, 19.1 0x8E, 0x81, 0x3B, BIP₃, 0xDE, 0x31, 0x46, BIP₇ 0x71, 0x7E,0xC4, BIP₇ 19.0-40 0x09, 0xF2, 0xA6, BIP₃, 0xF6, 0x0D, 0x59, BIP₇

Further, 40 GbE Ethernet and 100 GbE Ethernet links, as well as OpticalInternetworking Forum (OIF) MLG definition of 4×25G and 8×25G, embedBIP-3 and BIP-7 blocks into respective PCS lane numbers. As discussedabove, BIP-3 is an 8 parity bit word that may be used to quicklyestimate a BER for a network link. IEEE 802.3 clause 82 defines a paritydefinition for BIP-3. An example of BIP-3 value assignment is shownbelow in Table 6.

TABLE 6 BIP3 Value Assignment BIP-3 Bit Number Assigned 66-bit Word Bits0 2, 10, 18, 26, 34, 42, 50, 58 1 3, 11, 19, 27, 35, 43, 51, 59 2 4, 12,20, 28, 36, 44, 52, 60 3 0, 5, 13, 21, 29, 37, 45, 53, 61 4 1, 6, 14,22, 30, 38, 46, 54, 62 5 7, 15, 24, 31, 39, 47, 55, 63 6 8, 16, 24, 32,40, 48, 56, 64 7 9, 17, 25, 33, 41, 49, 57, 65

For example, BIP-3, bit 0, is an exclusive or of bits 2, 10, 18, 26, 34,42, 50, 58 from a 66-bit word. Because BIP-7 may be a bitwise inversionof BIP-3, it is capable of being used to carry network management data220 between two communication devices, such as host and a client,without the need of a separate Ethernet link or console 110. The BIP-3or BIP-7 block in MLD or MLG traffic can be used to carry point-to-pointor multi-point management information between a host and a client orbetween two hosts. The generation of a DC balanced transmission frame218 will be discussed in greater detail below.

Moving on to FIG. 4, shown is a drawing of a portion of a networkcomprising an Ethernet switch 403 and a gearbox PHY 406 according tovarious embodiments of the present disclosure. The Ethernet switch 403is operable to generate, modify, and/or transmit transmission frames 218(e.g., Ethernet frames or data packets) to the gearbox PHY 406 and/orother devices over the network 212. As discussed above, the transmissionframe 218, for example, may comprise control data and payload data,wherein the control data facilitates the routing and transmission of thepayload data in the transmission frame 218 to a communication device.The transmission frame 218 may also comprise network management data 220that is located in, for example, portions of the transmission frame 218.

Thus, the Ethernet switch 403 may comprise processing circuitry thatmay, for example, generate data, format data, transmit data, and/orperform other processing functionality. As such, the Ethernet switch 403may comprise, for example, a network interface card (NIC), a transceiverphysical layer (PHY) 409, a field-programmable gate array (FPGA), and/orother types of components. Accordingly, a transmission frame 218comprising network management data 220 may be read from or written to bya PHY 409, a chip, an FPGA, or any other circuitry within or otherwisein data communication with the Ethernet switch 403.

According to various embodiments, the original BIP-3 data is preservedand the network management data 220 is added to the BIP-7 block 315while maintaining DC balance. The gearbox PHY 406, upon receipt of thetransmission frame 218, reads and monitors the BIP-3 block 312 (FIG. 3)for a BER of a network link, however, the BIP-7 block 315 now containsnetwork management data 220 from the Ethernet switch 403. According toone embodiment, the gearbox PHY 406 may be configured restore the BIP-7block 315 to its original value (i.e., the bitwise inverse of the BIP-3block 312). According to another embodiment, the gearbox PHY 406 mayrefrain from restoring the BIP-7 block 315 to its original value bysending the transmission frame 218 with the BIP-3 block 312 and theBIP-7 block 315 of the transmission frame 218 unchanged.

According to various embodiments, the Ethernet switch 403 and thegearbox PHY 406 may communicate as a host-client arrangement or as aclient-client arrangement and may communicate directly or indirectly(i.e., over a network 212) with a network management device 410. Region412 and region 415 illustrate that the gearbox PHY 406 may communicatewith downstream devices or, alternatively, may communicate with thenetwork 212. According to various embodiments, a gearbox PHY 406 maycomprise a processor-less device, a multi-link distribution (MLD)device, and/or a multi-link gearbox (MLG). For example, the gearbox PHY406 may comprise the Broadcom® BCM84790 gearbox PHY or the BCM84793gearbox PHY. In various embodiments, the gearbox PHY 406 may comprise a10 GbE, 40 GbE, or 100 GbE physical layer device while offering amulti-rate interface for 4-lane (4×25 Gbps) and 10-lane (10×10 Gbps)bi-directional transmissions.

Referring next to FIG. 5, shown is a drawing of a portion of a networkcomprising a first Ethernet switch 503 and a second Ethernet switch 506according to various embodiments of the present disclosure. The firstEthernet switch 503 is operable to generate, modify, and/or transmittransmission frames 218 (e.g., Ethernet frames or data packets) to thesecond Ethernet frame 506 and/or other devices over the network 212. Inaddition, the first Ethernet switch 503 and the second Ethernet switch506 may be in data communication with a network management device 410.As discussed above, the transmission frame 218, for example, maycomprise control data and payload data, wherein the control datafacilitates the routing and transmission of the payload data in thetransmission frame 218 to the second Ethernet switch 506 or any othercommunication device. The transmission frame 218 may comprise, forexample, network management data 220.

Accordingly, the first Ethernet switch 503 and/or the second Ethernetswitch 506 may comprise processing circuitry that may, for example,generate data, format data, transmit data, and/or perform otherprocessing functionality. As such, the Ethernet switch 403 may comprise,for example, a network interface card (NIC), a transceiver physicallayer (PHY), a field-programmable gate array (FPGA), and/or other typesof components. Accordingly, a transmission frame 218 may be read orwrite network management data 220 by a NIC, a PHY, a chip, an FPGA, orany other circuitry within or otherwise in data communication with thefirst Ethernet switch 503 or the second Ethernet switch 506. Althoughthe non-limiting example of FIG. 5 depicts a first Ethernet switch 503and a second Ethernet switch 506, the example is not so limiting. Forexample, the combination of the first Ethernet switch 503 and the secondEthernet switch 506 may comprise a combination or sub-combination ofother communication devices such as a server computer, a switch, anetwork controller, a router, or any other suitable communicationdevice.

Turning now to FIG. 6, shown is a flowchart that provides one example ofthe operation of a portion of the source device processing circuitry 215according to various embodiments. It is understood that the flowchart ofFIG. 6 provides merely an example of the many different types offunctional arrangements that may be employed to implement the operationof the portion of the source device processing circuitry 215 asdescribed herein. As an alternative, the flowchart of FIG. 6 may beviewed as depicting an example of elements of a method implemented in aprogram executable in a processor of the source device 203 (FIG. 2), orany other communication device, according to one or more embodiments.

Beginning with 603, the source device processing circuitry 215 isoperable to encode a BIP error code for monitored data for transmissionin a first BIP block 312 (FIG. 3). For example, an X-bit BIP error codemay be generated for a monitored portion of data (e.g., monitoredpayload data over a network link) having even parity for transmission ina block of a transmission frame 218. A first BIP block 312 may comprise,for example, an error detection code in a first BIP format. In thenon-limiting example of FIG. 3, the first BIP format may comprise BIP-3having an error detection code of 8 bits. BIP-3 may comprise, forexample, 8 parity bits to quickly estimate a bit error rate (BER) for amonitored portion of data at a PHY layer.

In 606, the source device processing circuitry 215 may encode networkmanagement data 220 according to a predefined block code fortransmission in a second BIP block 315 (FIG. 3) of a transmission frame218. A second BIP block 315 may comprise, for example, an errordetection code in a second BIP format. For example, the second BIPformat may comprise BIP-7 having an error detection code of 8 bits. Asmay be appreciated, in various structures of alignment markers 300, thesecond BIP block 315 may comprise a bitwise inverse (XOR) of the bits inthe first BIP block 312 to maintain a DC balance in the transmissionframe 218.

Accordingly, a primary use of a BIP-7 block 315 is to maintain DC paritywith the BIP-3 block 312. However, all or at least a portion of the bitsin the second BIP block 315 may be dedicated for encoding networkmanagement data 220 while maintaining the DC balance. Accordingly,network management data 220 may be transmitted in otherwise existingtransmission frames 218 while maintaining DC balance in the alignmentmarker 300.

As a non-limiting example, all 8 bits in an 8-bit second BIP block 315may be used to encode network management data 220. The 8 bitsrepresenting network management data 220 may be encoded according to ablock code so that the resulting bits maintain DC balance in thetransmission frame 218, while comprising network management data 200. Ablock code may comprise, for example, 3B/4B block code, 4B/5B blockcode, 8B/10B block code, and/or any other block code encoding techniquethat may encode network management data 220 while maintaining DCbalance.

In another example, a portion of bits in the second BIP block 315 (asopposed to all the bits in the second BIP block 315) may be employed toencode network management data 220. As a non-limiting example, 4 bits ofthe 8-bit second BIP block 315, or any other subset of bits, may beemployed to encode network management data 220. The remaining bits inthe second BIP block 315 may be determined such that DC balance ismaintained in the transmission frame 218. Accordingly, networkmanagement data 220 may be encoded in existing transmission frames 218without necessitating separate transmission of the network managementdata 220 as a payload in a plurality of transmission frames 218, therebyavoiding an increase in bandwidth of a network 212.

In 609, a transmission frame 218 may be generated or otherwisereconfigured to include both the first BIP block 312 and the second BIPblock 315, wherein the transmission frame 218 has DC balance. In 612,the transmission frame 218, comprising the network management data 220,may be transmitted from the source device 203 to a destination device206. To restate, the transmission frame 218, comprising the networkmanagement data 220, may be transmitted from a first communicationdevice to a second communication device.

Turning now to FIG. 7, shown is a flowchart that provides one example ofthe operation of a portion of a communication chip according to variousembodiments. It is understood that the flowchart 700 of FIG. 7 providesmerely an example of the many different types of functional arrangementsthat may be employed to implement the operation of the portion of thecommunication chip as described herein.

Beginning with 703, a first communication chip is operable to encode aBIP error code for monitored data for transmission in a first BIP block312 (FIG. 3). As described above, an X-bit BIP error code may begenerated for a monitored portion of data (e.g., monitored payload dataover a bus) having even parity for transmission in a block of atransmission frame 218. A first BIP block 312 may comprise, for example,an error detection code in a first BIP format. In the non-limitingexample of FIG. 3, the first BIP format may comprise BIP-3 having anerror detection code of 8 bits. BIP-3 may comprise, for example, 8parity bits to quickly estimate a bit error rate (BER) for a monitoredportion of data over the bus.

In 706, the first communication chip is operate to encode managementdata (as opposed to network management data 220) according to apredefined block code for transmission in a second BIP block 315 (FIG.3) of a transmission frame 218. A second BIP block 315 may comprise, forexample, an error detection code in a second BIP format. For example,the second BIP format may comprise BIP-7 having an error detection codeof 8 bits. As may be appreciated, in various structures of alignmentmarkers 300, the second BIP block 315 may comprise a bitwise inverse(XOR) of the bits in the first BIP block 312 to maintain a DC balance inthe transmission frame 218.

Accordingly, a primary use of a BIP-7 block 315 is to maintain DC paritywith the BIP-3 block 312. However, all or at least a portion of the bitsin the second BIP block 315 may be dedicated for encoding managementdata while maintaining the DC balance. Accordingly, management data maybe transmitted in otherwise existing transmission frames 218 whilemaintaining DC balance in the alignment marker 300.

As a non-limiting example, all 8 bits in an 8-bit second BIP block 315may be used to encode network management data 220. The 8 bitsrepresenting network management data 220 may be encoded according to ablock code so that the resulting bits maintain DC balance in thetransmission frame 218, while comprising network management data 200. Ablock code may comprise, for example, 3B/4B block code, 4B/5B blockcode, 8B/10B block code, and/or any other block code that may encodenetwork management data 220 while maintaining DC balance.

In another example, a portion of bits in the second BIP block 315 (asopposed to all the bits in the second BIP block 315) may be employed toencode network management data 220. As a non-limiting example, 4 bits ofthe 8-bit second BIP block 315, or any other subset of bits, may beemployed to encode network management data 220. The remaining bits inthe second BIP block 315 may be determined such that DC balance ismaintained in the transmission frame 218. Accordingly, management datamay be encoded in existing transmission frames 218 without necessitatingseparate transmission of the management data as a payload in a pluralityof transmission frames 218, thereby avoiding an increase of data on thebus.

In 709, a transmission frame 218 may be generated or otherwisereconfigured to include both the first BIP block 312 and the second BIPblock 315, wherein the transmission frame 218 has a DC balance. In 712,the transmission frame 218, comprising the management data, may betransmitted from the first chip to a second chip.

With reference to FIG. 8, shown is a schematic block diagram of thesource device 203 according to an embodiment of the present disclosure.According to various embodiments, the source device 203 may comprise atleast one processor circuit, for example, having a processor 803 and amemory 806, both of which are coupled to a local interface 809. Thelocal interface 809 may comprise, for example, a data bus with anaccompanying address/control bus or other bus structure as can beappreciated.

Stored in the memory 806 are both data and several components that areexecutable by the processor 803. In particular, stored in the memory 806and executable by the processor 803 is an encoding application 812 thatperforms the operations depicted in FIGS. 6 and 7, and potentially otherapplications. Also stored in the memory 806 may be a data store 815 andother data. In addition, an operating system may be stored in the memory806 and executable by the processor 803.

It is understood that there may be other applications that are stored inthe memory 806 and are executable by the processor 803 as can beappreciated. Where any component discussed herein is implemented in theform of software, any one of a number of programming languages may beemployed such as, for example, C, C++, C#, Objective C, Java®,JavaScript®, Perl, PHP, Visual Basic®, Python®, Ruby, Flash®, or otherprogramming languages.

A number of software components are stored in the memory 806 and areexecutable by the processor 803. In this respect, the term “executable”means a program file that is in a form that can ultimately be run by theprocessor 803. Examples of executable programs may be, for example, acompiled program that can be translated into machine code in a formatthat can be loaded into a random access portion of the memory 806 andrun by the processor 803, source code that may be expressed in properformat such as object code that is capable of being loaded into a randomaccess portion of the memory 806 and executed by the processor 803, orsource code that may be interpreted by another executable program togenerate instructions in a random access portion of the memory 806 to beexecuted by the processor 803, etc. An executable program may be storedin any portion or component of the memory 806 including, for example,random access memory (RAM), read-only memory (ROM), hard drive,solid-state drive, USB flash drive, memory card, optical disc such ascompact disc (CD) or digital versatile disc (DVD), floppy disk, magnetictape, or other memory components.

The memory 806 is defined herein as including both volatile andnonvolatile memory and data storage components. Volatile components arethose that do not retain data values upon loss of power. Nonvolatilecomponents are those that retain data upon a loss of power. Thus, thememory 806 may comprise, for example, random access memory (RAM),read-only memory (ROM), hard disk drives, solid-state drives, USB flashdrives, memory cards accessed via a memory card reader, floppy disksaccessed via an associated floppy disk drive, optical discs accessed viaan optical disc drive, magnetic tapes accessed via an appropriate tapedrive, and/or other memory components, or a combination of any two ormore of these memory components. In addition, the RAM may comprise, forexample, static random access memory (SRAM), dynamic random accessmemory (DRAM), or magnetic random access memory (MRAM) and other suchdevices. The ROM may comprise, for example, a programmable read-onlymemory (PROM), an erasable programmable read-only memory (EPROM), anelectrically erasable programmable read-only memory (EEPROM), or otherlike memory device.

Also, the processor 803 may represent multiple processors 803 and/ormultiple processor cores and the memory 806 may represent multiplememories 806 that operate in parallel processing circuits, respectively.In such a case, the local interface 809 may be an appropriate networkthat facilitates communication between any two of the multipleprocessors 803, between any processor 803 and any of the memories 806,or between any two of the memories 806, etc. The local interface 809 maycomprise additional systems designed to coordinate this communication,including, for example, performing load balancing. The processor 803 maybe of electrical or of some other available construction.

Although the encoding application 812, and other various systemsdescribed herein may be embodied in software or code executed by generalpurpose hardware as discussed above, as an alternative the same may alsobe embodied in dedicated hardware or a combination of software/generalpurpose hardware and dedicated hardware. If embodied in dedicatedhardware, each can be implemented as a circuit or state machine thatemploys any one of or a combination of a number of technologies. Thesetechnologies may include, but are not limited to, discrete logiccircuits having logic gates for implementing various logic functionsupon an application of one or more data signals, application specificintegrated circuits (ASICs) having appropriate logic gates,field-programmable gate arrays (FPGAs), or other components, etc. Suchtechnologies are generally well known by those skilled in the art and,consequently, are not described in detail herein.

The flowcharts of FIGS. 6 and 7 show the functionality and operation ofan implementation of portions of the encoding application. If embodiedin software, each block may represent a module, segment, or portion ofcode that comprises program instructions to implement the specifiedlogical function(s). The program instructions may be embodied in theform of source code that comprises human-readable statements written ina programming language or machine code that comprises numericalinstructions recognizable by a suitable execution system such as aprocessor 803 in a computer system or other system. The machine code maybe converted from the source code, etc. If embodied in hardware, eachblock may represent a circuit or a number of interconnected circuits toimplement the specified logical function(s).

Although the flowcharts of FIGS. 6 and 7 show a specific order ofexecution, it is understood that the order of execution may differ fromthat which is depicted. For example, the order of execution of two ormore blocks may be scrambled relative to the order shown. Also, two ormore blocks shown in succession in FIGS. 6 and 7 may be executedconcurrently or with partial concurrence. Further, in some embodiments,one or more of the blocks shown in FIGS. 6 and 7 may be skipped oromitted. In addition, any number of counters, state variables, warningsemaphores, or messages might be added to the logical flow describedherein, for purposes of enhanced utility, accounting, performancemeasurement, or providing troubleshooting aids, etc. It is understoodthat all such variations are within the scope of the present disclosure.

Also, any logic or application described herein, including the encodingapplication 812, that comprises software or code can be embodied in anynon-transitory computer-readable medium for use by or in connection withan instruction execution system such as, for example, a processor 803 ina computer system or other system. In this sense, the logic maycomprise, for example, statements including instructions anddeclarations that can be fetched from the computer-readable medium andexecuted by the instruction execution system. In the context of thepresent disclosure, a “computer-readable medium” can be any medium thatcan contain, store, or maintain the logic or application describedherein for use by or in connection with the instruction executionsystem.

The computer-readable medium can comprise any one of many physical mediasuch as, for example, magnetic, optical, or semiconductor media. Morespecific examples of a suitable computer-readable medium would include,but are not limited to, magnetic tapes, magnetic floppy diskettes,magnetic hard drives, memory cards, solid-state drives, USB flashdrives, or optical discs. Also, the computer-readable medium may be arandom access memory (RAM) including, for example, static random accessmemory (SRAM) and dynamic random access memory (DRAM), or magneticrandom access memory (MRAM). In addition, the computer-readable mediummay be a read-only memory (ROM), a programmable read-only memory (PROM),an erasable programmable read-only memory (EPROM), an electricallyerasable programmable read-only memory (EEPROM), or other type of memorydevice.

Further, any logic or application described herein, including theencoding application 812, may be implemented and structured in a varietyof ways. For example, one or more applications described may beimplemented as modules or components of a single application. Further,one or more applications described herein may be executed in shared orseparate computing devices or a combination thereof. For example, aplurality of the applications described herein may execute in the samesource device 203, or in multiple computing devices in the samecomputing environment. Additionally, it is understood that terms such as“application,” “service,” “system,” “engine,” “module,” and so on may beinterchangeable and are not intended to be limiting.

Disjunctive language such as the phrase “at least one of X, Y, or Z,”unless specifically stated otherwise, is otherwise understood with thecontext as used in general to present that an item, term, etc., may beeither X, Y, or Z, or any combination thereof (e.g., X, Y, and/or Z).Thus, such disjunctive language is not generally intended to, and shouldnot, imply that certain embodiments require at least one of X, at leastone of Y, or at least one of Z to each be present.

It should be emphasized that the above-described embodiments of thepresent disclosure are merely possible examples of implementations setforth for a clear understanding of the principles of the disclosure.Many variations and modifications may be made to the above-describedembodiment(s) without departing substantially from the spirit andprinciples of the disclosure. All such modifications and variations areintended to be included herein within the scope of this disclosure andprotected by the following claims.

Therefore, the following is claimed:
 1. A system for in-band networkmanagement, comprising: a first communication device in datacommunication with a second communication device, wherein the firstcommunication device is operable to: encode a bit-interleaved parityerror code for a monitored portion of network data; encode networkmanagement data in a plurality of bits according to a predefined blockcode; generate a transmission frame comprising a first bit-interleavedparity block including the encoded bit-interleaved parity error code anda second bit-interleaved parity block including at least the encodednetwork management data; and transmit the transmission frame from thefirst communication device to the second communication device.
 2. Thesystem of claim 1, wherein the predefined block code generates theplurality of bits to maintain a DC balance between the bit-interleavedparity error code and the plurality of bits.
 3. The system of claim 2,wherein the first communication device is further operable to generate auniform block comprising at least the plurality of bits having encodednetwork management data and a plurality of remaining bits in the secondbit-interleaved parity block encoded to maintain DC balance between thebit-interleaved parity error code and the uniform block.
 4. The systemof claim 1, wherein the plurality of bits comprises a predefined numberof bits, wherein the predefined number of bits are operable to beconfigured by an administrator of the in-band network management.
 5. Thesystem of claim 1, wherein the predefined block code is selected from agroup consisting of 3B/4B block code, 4B/5B block code, and 8B/10B blockcode.
 6. The system of claim 1, wherein the first bit-interleaved parityblock comprises bit-interleaved parity-3.
 7. The system of claim 1,wherein the second bit-interleaved parity block comprisesbit-interleaved parity-7.
 8. The system of claim 1, wherein the networkmanagement data further comprises point-to-point or multi-pointmanagement information between the first communication device and thesecond communication device.
 9. The system of claim 1, wherein the firstcommunication device comprises a first Ethernet switch and the secondcommunication device comprises a second Ethernet switch.
 10. The systemof claim 1, wherein the first communication device comprises an Ethernetswitch and the second communication device comprises a gearbox PHY. 11.A method for in-band network management, comprising: encoding, by afirst communication device, a bit-interleaved parity error code for amonitored portion of network data; encoding, by the first communicationdevice, network management information in a plurality of bits accordingto a predefined block code, wherein the predefined block code generatesthe plurality of bits to maintain a DC balance between the encodedbit-interleaved parity error code and the plurality of bits; generating,by the first communication device, a transmission frame comprising afirst bit-interleaved parity block including the encoded bit-interleavedparity error code and a second bit-interleaved parity block includingthe encoded network management information; and transmitting thetransmission frame from the first communication device to a secondcommunication device.
 12. The method of claim 11, further comprisinggenerating, by the first communication device, a uniform blockcomprising at least the plurality of bits having encoded networkmanagement data and a plurality of remaining bits in the secondbit-interleaved parity block encoded to maintain DC balance between thebit-interleaved parity error code and the uniform block.
 13. The methodof claim 11, wherein the plurality of bits comprises a predefined numberof bits, wherein the predefined number of bits are operable to beconfigured by an administrator of the in-band network management. 14.The method of claim 11, wherein the predefined block code is selectedfrom a group consisting of 3B/4B block code, 4B/5B block code, and8B/10B block code.
 15. The method of claim 11, wherein the firstbit-interleaved parity block comprises bit-interleaved parity-3.
 16. Themethod of claim 11, wherein the second bit-interleaved parity blockcomprises bit-interleaved parity-7.
 17. The method of claim 11, whereinthe network management information further comprises point-to-point ormulti-point management information between the first communicationdevice and the second communication device.
 18. A non-transitorycomputer-readable medium embodying a program executable in a processorin data communication with a first communication device, the programcomprising code that: encodes a bit-interleaved parity error code for amonitored portion of network data in a first bit-interleaved parityblock; encodes network management data in a plurality of bits fortransmission in a second bit-interleaved parity block according to apredefined block code, wherein the predefined block code generates theplurality of bits to maintain a DC balance between the bit-interleavedparity error code and the plurality of bits; generates a transmissionframe comprising at least the first bit-interleaved parity block and thesecond bit-interleaved parity block; and transmits the transmissionframe from the first communication device to a second communicationdevice.
 19. The non-transitory computer-readable medium of claim 18,wherein the first bit-interleaved parity block comprises bit-interleavedparity-3.
 20. The non-transitory computer-readable medium of claim 18,wherein the second bit-interleaved parity block comprisesbit-interleaved parity-7.